A novel ultra-low-power CNTFET and 45 nm CMOS based ternary SRAM

Optimized buffer insertion for efficient interconnects designs

(2020) Afreen Khursheed et al.   INTERNATIONAL JOURNAL OF NUMERICAL MODELLING-ELECTRONIC NETWORKS DEVICES AND FIELDS

High performance, variation-tolerant CNFET ternary full adder a process, voltage, and temperature variation-resilient design

(2019) Samane Firouzi et al.   COMPUTERS & ELECTRICAL ENGINEERING

Two novel inverter-based ternary full adder cells using CNFETs for energy-efficient applications

(2019) Iman Mahmoudi Salehabad et al.   INTERNATIONAL JOURNAL OF ELECTRONICS

Design and performance analysis of wrap-gate CNTFET-based ring oscillators for IoT applications

(2019) Mohammad Khaleqi Qaleh Jooq et al.   INTEGRATION-THE VLSI JOURNAL

A 1‐bit full adder using CNFET based dual chirality high speed domino logic

(2019) Sandeep Garg et al.   INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS

A novel design of a ternary coded decimal adder/subtractor using reversible ternary gates

(2018) Mohammad Mehdi Panahi et al.   INTEGRATION-THE VLSI JOURNAL

Energy efficient design of CNFET-based multi-digit ternary adders

(2018) Chetan Vudadha et al.   MICROELECTRONICS JOURNAL

Design of an ultralow power CNTFET based 9T SRAM with shared BL and half select free techniques

(2018) Pramod Kumar Patel et al.   INTERNATIONAL JOURNAL OF NUMERICAL MODELLING-ELECTRONIC NETWORKS DEVICES AND FIELDS

High-Performance Ternary Adder Using CNTFET

(2017) Subhendu Kumar Sahoo et al.   IEEE TRANSACTIONS ON NANOTECHNOLOGY

High-performance ternary operators for scrambling

(2017) Mahya Sam Daliri et al.   INTEGRATION-THE VLSI JOURNAL

Carbon Nanotube Field Effect Transistor Switching Logic for Designing Efficient Ternary Arithmetic Circuits

(2017) Narges Hajizadeh Bastani et al.   Journal of Nanoelectronics and Optoelectronics

Design and process variation analysis of CNTFET-based ternary memory cells

(2016) Geunho Cho et al.   INTEGRATION-THE VLSI JOURNAL

CNTFET-based design of multi-bit adder circuits

(2016) Neda Talebipour et al.   INTERNATIONAL JOURNAL OF ELECTRONICS

CNFET-based approximate ternary adders for energy-efficient image processing applications

(2016) Atiyeh Panahi et al.   MICROPROCESSORS AND MICROSYSTEMS

An Ultra-Low-Power 9T SRAM Cell Based on Threshold Voltage Techniques

(2015) Majid Moghaddam et al.   CIRCUITS SYSTEMS AND SIGNAL PROCESSING

A Novel Design of Ternary Full Adder Using CNTFETs

(2014) Sneh Lata Murotiya et al.   ARABIAN JOURNAL FOR SCIENCE AND ENGINEERING

A universal method for designing low-power carbon nanotube FET-based multiple-valued logic circuits

(2013) Mohammad Hossein Moaiyeri et al.   IET Computers and Digital Techniques

Design of CNTFET-based 2-bit ternary ALU for nanoelectronics

(2013) Sneh Lata Murotiya et al.   INTERNATIONAL JOURNAL OF ELECTRONICS

Design of Ternary Logic Combinational Circuits Based on Quantum Dot Gate FETs

(2012) Supriya Karmakar et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

Design of energy-efficient and robust ternary circuits for nanotechnology

(2011) M.H. Moaiyeri et al.   IET Circuits Devices & Systems

High-speed full adder based on minority function and bridge style for nanoscale

(2011) Keivan Navi et al.   INTEGRATION-THE VLSI JOURNAL

Design and analysis of a high-performance CNFET-based Full Adder

(2011) Mohammad Hossein Moaiyeri et al.   INTERNATIONAL JOURNAL OF ELECTRONICS

Design of a ternary static memory cell using carbon nanotube-based transistors

(2011) K. You et al.   Micro & Nano Letters

CNTFET-Based Design of Ternary Logic Gates and Arithmetic Circuits

(2009) Sheng Lin et al.   IEEE TRANSACTIONS ON NANOTECHNOLOGY