An Ultra-Low-Power 9T SRAM Cell Based on Threshold Voltage Techniques

Robust FinFET SRAM design based on dynamic back-gate voltage adjustment

(2014) Behzad Ebrahimi et al.   MICROELECTRONICS RELIABILITY

A 250 mV 8 kb 40 nm Ultra-Low Power 9T Supply Feedback SRAM (SF-SRAM)

(2011) Adam Teman et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

Understanding DC Behavior of Subthreshold CMOS Logic Through Closed-Form Analysis

(2010) Massimo Alioto   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

Statistical Design Optimization of FinFET SRAM Using Back-Gate Voltage

(2010) Behzad Ebrahimi et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

Novel direct designs for 3-input XOR function for low-power and high-speed applications

(2010) Mohammad Hossein Moaiyeri et al.   INTERNATIONAL JOURNAL OF ELECTRONICS

A 32 kb 10T Sub-Threshold SRAM Array With Bit-Interleaving and Differential Read Scheme in 90 nm CMOS

(2009) Ik Joon Chang et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

Arithmetic Circuits of Redundant SUT-RNS

(2009) Somayeh Timarchi et al.   IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT

A 256 kb 65 nm 8T Subthreshold SRAM Employing Sense-Amplifier Redundancy

(2008) Naveen Verma et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

Characterization of a Novel Nine-Transistor SRAM Cell

(2008) Zhiyu Liu et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS