Resistor-less power-rail ESD clamp circuit design with adjustable NMOS gate biased voltage

Title
Resistor-less power-rail ESD clamp circuit design with adjustable NMOS gate biased voltage
Authors
Keywords
-
Journal
SEMICONDUCTOR SCIENCE AND TECHNOLOGY
Volume 38, Issue 11, Pages 115010
Publisher
IOP Publishing
Online
2023-10-11
DOI
10.1088/1361-6641/ad01d3

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