Area-efficient transient power-rail electrostatic discharge clamp circuit with mis-triggering immunity in a 65-nm CMOS process

Title
Area-efficient transient power-rail electrostatic discharge clamp circuit with mis-triggering immunity in a 65-nm CMOS process
Authors
Keywords
electrostatic discharge (ESD), power-rail clamp circuit, transmission line pulse (TLP), current mirror, mis-triggering, 静电放电, 电源钳位保护电路, 瞬态传输线脉冲, 电流镜, 误触发
Journal
Science China-Information Sciences
Volume 59, Issue 4, Pages -
Publisher
Springer Nature
Online
2015-10-01
DOI
10.1007/s11432-015-5398-3

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