A Schmitt-Trigger-Based Low-Voltage 11 T SRAM Cell for Low-Leakage in 7-nm FinFET Technology
出版年份 2022 全文链接
标题
A Schmitt-Trigger-Based Low-Voltage 11 T SRAM Cell for Low-Leakage in 7-nm FinFET Technology
作者
关键词
-
出版物
CIRCUITS SYSTEMS AND SIGNAL PROCESSING
Volume -, Issue -, Pages -
出版商
Springer Science and Business Media LLC
发表日期
2022-01-27
DOI
10.1007/s00034-021-01950-z
参考文献
相关参考文献
注意:仅列出部分参考文献,下载原文获取全部文献信息。- Single‐ended half‐select disturb‐free 11T static random access memory cell for reliable and low power applications
- (2021) Erfan Abbasian et al. INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS
- Design of a Schmitt-Trigger-Based 7T SRAM cell for variation resilient Low-Energy consumption and reliable internet of things applications
- (2021) Erfan Abbasian et al. AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS
- Performance evaluation of GNRFET and TMDFET devices in static random access memory cells design
- (2021) Erfan Abbasian et al. INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS
- Half-select disturb-free single-ended 9-transistor SRAM cell with bit-interleaving scheme in TMDFET technology
- (2021) Farzaneh Izadinasab et al. MICROELECTRONICS JOURNAL
- A robust and write bit-line free sub-threshold 12T-SRAM for ultra low power applications in 14 nm FinFET technology
- (2021) Mehrzad Karamimanesh et al. MICROELECTRONICS JOURNAL
- One-Sided Schmitt-Trigger-Based 9T SRAM Cell for Near-Threshold Operation
- (2020) Keonhee Cho et al. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
- A variation-aware design for storage cells using Schottky-barrier-type GNRFETs
- (2020) Erfan Abbasian et al. Journal of Computational Electronics
- A Schmitt-trigger based low read power 12T SRAM cell
- (2020) Ashish Sachdeva et al. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
- A low-leakage and high-writable SRAM cell with back-gate biasing in FinFET technology
- (2019) Sina Sayyah Ensan et al. Journal of Computational Electronics
- Characterization of Half-Select Free Write Assist 9T SRAM Cell
- (2019) Soumitra Pal et al. IEEE TRANSACTIONS ON ELECTRON DEVICES
- A Half-Select Disturb-Free 11T SRAM Cell With Built-In Write/Read-Assist Scheme for Ultralow-Voltage Operations
- (2019) Yajuan He et al. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
- An improved read-assist energy efficient single ended P-P-N based 10T SRAM cell for wireless sensor network
- (2019) Prachi Sanvale et al. MICROELECTRONICS JOURNAL
- A highly stable reliable SRAM cell design for low power applications
- (2019) Soumitra Pal et al. MICROELECTRONICS RELIABILITY
- Robust TFET SRAM cell for ultra-low power IoT applications
- (2018) Sayeed Ahmad et al. AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS
- A robust and low-power near-threshold SRAM in 10-nm FinFET technology
- (2018) Sina Sayyah Ensan et al. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
- Design of differential TG based 8T SRAM cell for ultralow-power applications
- (2018) Chandramaulashwar Roy et al. MICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS
- Efficient and Robust SRAM Cell Design Based on Quantum-Dot Cellular Automata
- (2018) Saeid Azimi et al. ECS Journal of Solid State Science and Technology
- A low-power single-ended SRAM in FinFET technology
- (2018) Sina Sayyah Ensan et al. AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS
- Power-Gated 9T SRAM Cell for Low-Energy Operation
- (2017) Tae Woo Oh et al. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
- Low Leakage Single Bitline 9 T (SB9T) Static Random Access Memory
- (2017) Sayeed Ahmad et al. MICROELECTRONICS JOURNAL
- 9-T SRAM Cell for Reliable Ultralow-Power Applications and Solving Multibit Soft-Error Issue
- (2016) Soumitra Pal et al. IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY
- Single-Ended Schmitt-Trigger-Based Robust Low-Power SRAM Cell
- (2016) Sayeed Ahmad et al. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
- A near-threshold 7T SRAM cell with high write and read margins and low write time for sub-20nm FinFET technologies
- (2015) Mohammad Ansari et al. INTEGRATION-THE VLSI JOURNAL
- A Single-Ended Disturb-Free 9T Subthreshold SRAM With Cross-Point Data-Aware Write Word-Line Structure, Negative Bit-Line, and Adaptive Read Operation Timing Tracing
- (2012) Ming-Hsien Tu et al. IEEE JOURNAL OF SOLID-STATE CIRCUITS
- P-P-N Based 10T SRAM Cell for Low-Leakage and Resilient Subthreshold Operation
- (2011) Cheng-Hung Lo et al. IEEE JOURNAL OF SOLID-STATE CIRCUITS
- Ultralow-Voltage Process-Variation-Tolerant Schmitt-Trigger-Based SRAM Design
- (2011) Jaydeep P. Kulkarni et al. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
- Characterization of a Novel Nine-Transistor SRAM Cell
- (2008) Zhiyu Liu et al. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
Create your own webinar
Interested in hosting your own webinar? Check the schedule and propose your idea to the Peeref Content Team.
Create NowBecome a Peeref-certified reviewer
The Peeref Institute provides free reviewer training that teaches the core competencies of the academic peer review process.
Get Started