A robust and write bit-line free sub-threshold 12T-SRAM for ultra low power applications in 14 nm FinFET technology

Single‐ended half‐select disturb‐free 11T static random access memory cell for reliable and low power applications

(2021) Erfan Abbasian et al.   INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS

Half-select disturb-free single-ended 9-transistor SRAM cell with bit-interleaving scheme in TMDFET technology

(2021) Farzaneh Izadinasab et al.   MICROELECTRONICS JOURNAL

A low power subthreshold Schmitt Trigger based 12T SRAM bit cell with process-variation-tolerant write-ability

(2020) Prakhar Sharma et al.   MICROELECTRONICS JOURNAL

Stability Enhancing SRAM cell for low power LUT Design

(2020) S.M. Swamynathan et al.   MICROELECTRONICS JOURNAL

A single-ended low leakage and low voltage 10T SRAM cell with high yield

(2020) Nima Eslami et al.   ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING

Power optimized SRAM cell with high radiation hardened for aerospace applications

(2020) Govind Prasad et al.   MICROELECTRONICS JOURNAL

Comparing bulk-Si FinFET and gate-all-around FETs for the 5 ​nm technology node

(2020) Vinay Vashishtha et al.   MICROELECTRONICS JOURNAL

Characterization of Half-Select Free Write Assist 9T SRAM Cell

(2019) Soumitra Pal et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES

Embedded memory options for ultra-low power IoT devices

(2019) Khader Mohammad et al.   MICROELECTRONICS JOURNAL

A robust and low-power near-threshold SRAM in 10-nm FinFET technology

(2018) Sina Sayyah Ensan et al.   ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING

A robust, ultra low-power, data-dependent-power-supplied 11T SRAM cell with expanded read/write stabilities for internet-of-things applications

(2018) Vishal Sharma et al.   ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING

Power-Gated 9T SRAM Cell for Low-Energy Operation

(2017) Tae Woo Oh et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

The Observation of Width Quantization Impact on Device Performance and Reliability for High-k/Metal Tri-Gate FinFET

(2016) Wen-Kuan Yeh et al.   IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY

Charge-sharing read port with bitline pre-charging and sensing scheme for low-power SRAMs

(2016) Naeem Maroof et al.   INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS

A 20 nm robust single-ended boost-less 7T FinFET sub-threshold SRAM cell under process–voltage–temperature variations

(2016) C.B. Kushwah et al.   MICROELECTRONICS JOURNAL

A novel design of low power and high read stability Ternary SRAM (T-SRAM), memory based on the modified Gate Diffusion Input (m-GDI) method in nanotechnology

(2016) Ebrahim Abiri et al.   MICROELECTRONICS JOURNAL

A near-threshold 7T SRAM cell with high write and read margins and low write time for sub-20nm FinFET technologies

(2015) Mohammad Ansari et al.   INTEGRATION-THE VLSI JOURNAL

Design of low power and high read stability 8T-SRAM memory based on the modified Gate Diffusion Input (m-GDI) in 32nm CNTFET technology

(2015) Ebrahim Abiri et al.   MICROELECTRONICS JOURNAL

Comparative Simulation Analysis of Process-Induced Variability in Nanoscale SOI and Bulk Trigate FinFETs

(2013) Andrew R. Brown et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES

GIDL in Doped and Undoped FinFET Devices for Low-Leakage Applications

(2012) Pranita Kerber et al.   IEEE ELECTRON DEVICE LETTERS

A Single-Ended Disturb-Free 9T Subthreshold SRAM With Cross-Point Data-Aware Write Word-Line Structure, Negative Bit-Line, and Adaptive Read Operation Timing Tracing

(2012) Ming-Hsien Tu et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

A Differential Data-Aware Power-Supplied (D$^{2}$AP) 8T SRAM Cell With Expanded Write/Read Stabilities for Lower VDDmin Applications

(2010) Meng-Fan Chang et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

Benchmarking SOI and bulk FinFET alternatives for PLANAR CMOS scaling succession

(2010) T. Chiarella et al.   SOLID-STATE ELECTRONICS