A Power-Efficient 13-Tap FIR Filter and an IIR Filter Embedded in a 10-Bit SAR ADC

Low-Power SAR ADC Design: Overview and Survey of State-of-the-Art Techniques

(2022) Xiyuan Tang et al.   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

A Charge-Sharing IIR Filter With Linear Interpolation and High Stopband Rejection

(2022) Amir Bozorg et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

Analysis of RC Time-Constant Variations in Continuous-Time Pipelined ADCs

(2021) Shanthi Pavan et al.   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

A Low-Power, High-Linearity Wideband 3.25 GS/s Fourth-Order Programmable Analog FIR Filter Using Split-CDAC Coefficient Multipliers

(2020) Shinwoong Park et al.   IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES

Low-Power Highly Selective Channel Filtering Using a Transconductor–Capacitor Analog FIR

(2020) Bart J. Thijssen et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

Design and Analysis of a Programmable Receiver Front End Based on Baseband Analog-FIR Filtering Using an LPTV Resistor

(2018) Sameed Hameed et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

A Reconfigurable 10-to-12-b 80-to-20-MS/s Bandwidth Scalable SAR ADC

(2018) Yi Shen et al.   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

A 128-Tap Highly Tunable CMOS IF Finite Impulse Response Filter for Pulsed Radar Applications

(2018) John S. Mincey et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

A Compact 10-b SAR ADC With Unit-Length Capacitors and a Passive FIR Filter

(2018) Pieter Harpe   IEEE JOURNAL OF SOLID-STATE CIRCUITS

A 0.029-mm2 17-fJ/Conversion-Step Third-Order CT $\Delta\Sigma$ ADC With a Single OTA and Second-Order Noise-Shaping SAR Quantizer

(2018) Jiaxin Liu et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

A 9-GS/s 1.125-GHz BW Oversampling Continuous-Time Pipeline ADC Achieving −164-dBFS/Hz NSD

(2017) Hajime Shibata et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

A Mostly Digital VCO-Based CT-SDM With Third-Order Noise Shaping

(2017) Amir Babaie-Fishani et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

A 72 dB-DR 465 MHz-BW Continuous-Time 1-2 MASH ADC in 28 nm CMOS

(2016) Yunzhi Dong et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

Analysis and Design of a High-Order Discrete-Time Passive IIR Low-Pass Filter

(2014) Massoud Tohidian et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

A Deterministic Digital Background Calibration Technique for VCO-Based ADCs

(2014) Sachin Rao et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

Design Techniques for Continuous-Time ΔΣ Modulators With Embedded Active Filtering

(2014) Radha S. Rajan et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

A 58.9-dB ACR, 85.5-dB SBA, 5–26-MHz Configurable-Bandwidth, Charge-Domain Filter in 65-nm CMOS

(2013) Ming-Feng Huang et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

A Flexible 500 MHz to 3.6 GHz Wireless Receiver with Configurable DT FIR and IIR Filter Embedded in a 7b 21 MS/s SAR ADC

(2012) D. T. Lin et al.   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

A 10-bit 100-MS/s Reference-Free SAR ADC in 90 nm CMOS

(2010) Yan Zhu et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS