Performance evaluation of GNRFET and TMDFET devices in static random access memory cells design

Single‐ended half‐select disturb‐free 11T static random access memory cell for reliable and low power applications

(2021) Erfan Abbasian et al.   INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS

Single Bit-line 11T SRAM Cell for Low Power and Improved Stability

(2020) Rohit Lorenzo et al.   IET Computers and Digital Techniques

Design and statistical analysis of low power and high speed 10T static random access memory cell

(2020) Govind Prasad et al.   INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS

A variation-aware design for storage cells using Schottky-barrier-type GNRFETs

(2020) Erfan Abbasian et al.   Journal of Computational Electronics

A Transmission Gate Based 9T SRAM cell For Variation Resilient Low Power and Reliable IoT Applications

(2019) Soumitra Pal et al.   IET Circuits Devices & Systems

Half-select free bit-line sharing 12T SRAM with double-adjacent bits soft error correction and a reconfigurable FPGA for low-power applications

(2019) Vishal Sharma et al.   AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS

A Reliable Write Assist Low Power SRAM Cell for Wireless Sensor Network Applications

(2019) Soumitra Pal et al.   IET Circuits Devices & Systems

Characterization of Half-Select Free Write Assist 9T SRAM Cell

(2019) Soumitra Pal et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES

A Half-Select Disturb-Free 11T SRAM Cell With Built-In Write/Read-Assist Scheme for Ultralow-Voltage Operations

(2019) Yajuan He et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

Half-Select-Free Low-Power Dynamic Loop-Cutting Write Assist SRAM Cell for Space Applications

(2019) Soumitra Pal et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES

A novel high-density dual threshold GNRFET SRAM design with improved stability

(2019) Pramod Kumar Patel et al.   MICROPROCESSORS AND MICROSYSTEMS

Pseudo differential multi-cell upset immune robust SRAM cell for ultra-low power applications

(2018) Sayeed Ahmad et al.   AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS

A 0.2 V 32-Kb 10T SRAM With 41 nW Standby Power for IoT Applications

(2018) Yung-Chen Chien et al.   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

Compact Modeling to Device- and Circuit-Level Evaluation of Flexible TMD Field-Effect Transistors

(2018) Morteza Gholipour et al.   IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS

Low Leakage Fully Half-Select-Free Robust SRAM Cells with BTI Reliability Analysis

(2018) Sayeed Ahmad et al.   IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY

2-D Layered Materials for Next-Generation Electronics: Opportunities and Challenges

(2018) Wei Cao et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES

A write-improved low-power 12T SRAM cell for wearable wireless sensor nodes

(2018) Vishal Sharma et al.   INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS

Low-Power Near-Threshold 10T SRAM Bit Cells With Enhanced Data-Independent Read Port Leakage for Array Augmentation in 32-nm CMOS

(2018) Shourya Gupta et al.   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

Half-Select Free and Bit-Line Sharing 9T SRAM for Reliable Supply Voltage Scaling

(2017) Kyungho Shin et al.   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

A Compact Short-Channel Model for Symmetric Double-Gate TMDFET in Subthreshold Region

(2017) Morteza Gholipour   IEEE TRANSACTIONS ON ELECTRON DEVICES

Stable, Reliable, and Bit-Interleaving 12T SRAM for Space Applications: A Device Circuit Co-Design

(2017) Nandakishor Yadav et al.   IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING

AS8-static random access memory (SRAM): asymmetric SRAM architecture for soft error hardening enhancement

(2017) Ihsen Alouani et al.   IET Circuits Devices & Systems

Low Leakage Single Bitline 9 T (SB9T) Static Random Access Memory

(2017) Sayeed Ahmad et al.   MICROELECTRONICS JOURNAL

Analytical SPICE-Compatible Model of Schottky-Barrier-Type GNRFETs With Performance Analysis

(2016) Morteza Gholipour et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

Design of an Ultra-low Voltage 9T SRAM With Equalized Bitline Leakage and CAM-Assisted Energy Efficiency Improvement

(2015) Bo Wang et al.   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

A SPICE-Compatible Model of MOS-Type Graphene Nano-Ribbon Field-Effect Transistors Enabling Gate- and Circuit-Level Delay and Power Analysis Under Process Variation

(2015) Ying-Yu Chen et al.   IEEE TRANSACTIONS ON NANOTECHNOLOGY

Design of low power and high read stability 8T-SRAM memory based on the modified Gate Diffusion Input (m-GDI) in 32nm CNTFET technology

(2015) Ebrahim Abiri et al.   MICROELECTRONICS JOURNAL

40 nm Bit-Interleaving 12T Subthreshold SRAM With Data-Aware Write-Assist

(2014) Yi-Wei Chiu et al.   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

Asymmetric Gate Schottky-Barrier Graphene Nanoribbon FETs for Low-Power Design

(2014) Morteza Gholipour et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES

An 8T Differential SRAM With Improved Noise Margin for Bit-Interleaving in 65 nm CMOS

(2011) Do Anh-Tuan et al.   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

Nanometer MOSFET Variation in Minimum Energy Subthreshold Circuits

(2008) Naveen Verma et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES