Doping-Less Tunnel Field Effect Transistor: Design and Investigation
Published 2013 View Full Article
- Home
- Publications
- Publication Search
- Publication Details
Title
Doping-Less Tunnel Field Effect Transistor: Design and Investigation
Authors
Keywords
-
Journal
IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 60, Issue 10, Pages 3285-3290
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Online
2013-08-16
DOI
10.1109/ted.2013.2276888
References
Ask authors/readers for more resources
Related references
Note: Only part of the references are listed.- Study of Random Dopant Fluctuation Induced Variability in the Raised-Ge-Source TFET
- (2013) Nattapol Damrongplasit et al. IEEE ELECTRON DEVICE LETTERS
- Junctionless Tunnel Field Effect Transistor
- (2013) Bahniman Ghosh et al. IEEE ELECTRON DEVICE LETTERS
- Bipolar Charge-Plasma Transistor: A Novel Three Terminal Device
- (2012) M. Jagadesh Kumar et al. IEEE TRANSACTIONS ON ELECTRON DEVICES
- Stochastic Variability in Silicon Double-Gate Lateral Tunnel Field-Effect Transistors
- (2012) Greg Leung et al. IEEE TRANSACTIONS ON ELECTRON DEVICES
- Improved subthreshold characteristics in tunnel field-effect transistors using shallow junction technologies
- (2012) Hsu-Yu Chang et al. SOLID-STATE ELECTRONICS
- A tunneling field-effect transistor exploiting internally combined band-to-band and barrier tunneling mechanisms
- (2011) Livio Lattanzio et al. APPLIED PHYSICS LETTERS
- Complementary Germanium Electron–Hole Bilayer Tunnel FET for Sub-0.5-V Operation
- (2011) Livio Lattanzio et al. IEEE ELECTRON DEVICE LETTERS
- Study of Random Dopant Fluctuation Effects in Germanium-Source Tunnel FETs
- (2011) Nattapol Damrongplasit et al. IEEE TRANSACTIONS ON ELECTRON DEVICES
- Novel Attributes of a Dual Material Gate Nanoscale Tunnel Field-Effect Transistor
- (2011) Sneh Saurabh et al. IEEE TRANSACTIONS ON ELECTRON DEVICES
- Tunnel field-effect transistors as energy-efficient electronic switches
- (2011) Adrian M. Ionescu et al. NATURE
- Drive current enhancement in p-tunnel FETs by optimization of the process conditions
- (2011) D. Leonelli et al. SOLID-STATE ELECTRONICS
- Fabrication and Characterization of the Charge-Plasma Diode
- (2010) Bijoy Rajasekharan et al. IEEE ELECTRON DEVICE LETTERS
- Estimation and Compensation of Process-Induced Variations in Nanoscale Tunnel Field-Effect Transistors for Improved Reliability
- (2010) Sneh Saurabh et al. IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY
- Dual-$k$ Spacer Device Architecture for the Improvement of Performance of Silicon n-Channel Tunnel FETs
- (2010) H G Virani et al. IEEE TRANSACTIONS ON ELECTRON DEVICES
- Effect of Pocket Doping and Annealing Schemes on the Source-Pocket Tunnel Field-Effect Transistor
- (2010) Ritesh Jhaveri et al. IEEE TRANSACTIONS ON ELECTRON DEVICES
- Low-Voltage Tunnel Transistors for Beyond CMOS Logic
- (2010) Alan C. Seabaugh et al. PROCEEDINGS OF THE IEEE
- Demonstration of Tunneling FETs Based on Highly Scalable Vertical Silicon Nanowires
- (2009) Z.X. Chen et al. IEEE ELECTRON DEVICE LETTERS
- Impact of Strain on Drain Current and Threshold Voltage of Nanoscale Double Gate Tunnel Field Effect Transistor: Theoretical Investigation and Analysis
- (2009) Sneh Saurabh et al. JAPANESE JOURNAL OF APPLIED PHYSICS
- Complementary Silicon-Based Heterostructure Tunnel-FETs With High Tunnel Rates
- (2008) Anne S. Verhulst et al. IEEE ELECTRON DEVICE LETTERS
- The Charge Plasma P-N Diode
- (2008) Raymond J. E. Hueting et al. IEEE ELECTRON DEVICE LETTERS
- Characterization of Polymetal Gate Transistors With Low-Temperature Atomic-Layer-Deposition-Grown Oxide Spacer
- (2008) Ga-Won Lee et al. IEEE ELECTRON DEVICE LETTERS
Find the ideal target journal for your manuscript
Explore over 38,000 international journals covering a vast array of academic fields.
SearchBecome a Peeref-certified reviewer
The Peeref Institute provides free reviewer training that teaches the core competencies of the academic peer review process.
Get Started