Device- and Circuit-Level Variability Caused by Line Edge Roughness for Sub-32-nm FinFET Technologies

Variability of Inversion-Mode and Junctionless FinFETs due to Line Edge Roughness

(2011) Greg Leung et al.   IEEE ELECTRON DEVICE LETTERS

Random variability modeling and its impact on scaled CMOS circuits

(2010) Yun Ye et al.   Journal of Computational Electronics

Impact of Line-Edge Roughness on Double-Gate Schottky-Barrier Field-Effect Transistors

(2009) Shimeng Yu et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES

Performance-Aware Corner Model for Design for Manufacturing

(2009) Chung-Hsun Lin et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES

Gate Line Edge Roughness Model for Estimation of FinFET Performance Variability

(2009) Kedar Patel et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES

Statistical Compact Model Parameter Extraction by Direct Fitting to Variations

(2008) Kiyoshi Takeuchi et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES

Impact of LER and Random Dopant Fluctuations on FinFET Matching Performance

(2008) E. Baravelli et al.   IEEE TRANSACTIONS ON NANOTECHNOLOGY

The impact of line edge roughness on the stability of a FinFET SRAM

(2008) Shimeng Yu et al.   SEMICONDUCTOR SCIENCE AND TECHNOLOGY

Impact of line width roughness on the matching performances of next-generation devices

(2007) C. Gustin et al.   THIN SOLID FILMS