4.2 Article

Analysis and modeling of an improved dual-array D/A network for SAR A/D converter

Journal

ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Volume 70, Issue 3, Pages 417-420

Publisher

SPRINGER
DOI: 10.1007/s10470-011-9707-5

Keywords

D/A conversion; Dual-array; Matlab modeling; Embedded SoC

Funding

  1. National Natural Science Foundation of China [60725415, 60971066, 61006028]
  2. National High-tech Program of China [2009AA01Z258]
  3. National Science and Technology Important Project of China [2009ZX01034-002-001-005]

Ask authors/readers for more resources

Based on the discussion of traditional dual-array charge scaling D/A conversion approach, an improved D/A network for successive approximation A/D converter (ADC) is proposed in this letter. With a unit capacitor instead of traditional non-integral scaling capacitor and by adding several additional logic control signals, this novel D/A network is easier to realize in process than traditional dual-array approach. Theoretical analysis and high-level Matlab modeling results prove that this improved D/A network is suitable for embedded SoC applications.

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