Chip-to-Chip Direct Interconnections by Using Controlled Flow Electroless Ni Plating

Critical Concerns in Soldering Reactions Arising from Space Confinement in 3-D IC Packages

(2012) H. Y. Chuang et al.   IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY

Fabrication and Thermo-Mechanical Characterization of Fine Pitch All-Copper Interconnect

(2012) Rajarshi Saha et al.   JOURNAL OF THE ELECTROCHEMICAL SOCIETY

Transition from flip chip solder joint to 3D IC microbump: Its effect on microstructure anisotropy

(2012) K.N. Tu et al.   MICROELECTRONICS RELIABILITY

Copper Electroless Bonding of Dome-Shaped Pillars for Chip-to-Package Interconnect

(2011) Hyo-Chol Koo et al.   JOURNAL OF THE ELECTROCHEMICAL SOCIETY

Reliability challenges in 3D IC packaging technology

(2010) K.N. Tu   MICROELECTRONICS RELIABILITY

Copper pillar bump design optimization for lead free flip-chip packaging

(2009) K. M. Chen et al.   JOURNAL OF MATERIALS SCIENCE-MATERIALS IN ELECTRONICS

Reliability of copper low-k interconnects

(2009) Zsolt Tőkei et al.   MICROELECTRONIC ENGINEERING

All-Copper Chip-to-Substrate Interconnects Part I. Fabrication and Characterization

(2008) Tyler Osborn et al.   JOURNAL OF THE ELECTROCHEMICAL SOCIETY