An Online-Spike-Sorting IC Using Unsupervised Geometry-Aware OSort Clustering for Efficient Embedded Neural-Signal Processing

A 16-Channel Fully Configurable Neural SoC with 1.52 μW/Ch Signal Acquisition, 2.79 μW/Ch Real-time Spike Classifier, and 1.79 TOPS/W Deep Neural Network Accelerator in 22 nm FDSOI

(2022) Seyed Mohammad Ali Zeinolabedin et al.   IEEE Transactions on Biomedical Circuits and Systems

Hardware-Efficient, On-the-Fly, On-Implant Spike Sorter Dedicated to Brain-Implantable Microsystems

(2022) Fereshteh Kalantari et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

Logarithmically scaled, gamma distributed neuronal spiking

(2022) Daniel Levenstein et al.   JOURNAL OF PHYSIOLOGY-LONDON

Neuropixels 2.0: A miniaturized high-density probe for stable, long-term brain recordings

(2021) Nicholas A. Steinmetz et al.   SCIENCE

A Multi-Channel Spike Sorting Processor With Accurate Clustering Algorithm Using Convolutional Autoencoder

(2021) Changyu Seong et al.   IEEE Transactions on Biomedical Circuits and Systems

SpikeForest, reproducible web-facing ground-truth validation of automated neural spike sorters

(2020) Jeremy Magland et al.   eLife

Spatial Information Based OSort for Real-Time Spike Sorting Using FPGA

(2020) Laszlo Schaffer et al.   IEEE TRANSACTIONS ON BIOMEDICAL ENGINEERING

A Compact Quad-Shank CMOS Neural Probe With 5,120 Addressable Recording Sites and 384 Fully Differential Parallel Channels

(2019) Shiwei Wang et al.   IEEE Transactions on Biomedical Circuits and Systems

An Area-Efficient 128-Channel Spike Sorting Processor for Real-Time Neural Recording With $0.175~\mu$ W/Channel in 65-nm CMOS

(2018) Anh Tuan Do et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

A Neural Probe With Up to 966 Electrodes and Up to 384 Configurable Channels in 0.13 $\mu$m SOI CMOS

(2017) Carolina Mora Lopez et al.   IEEE Transactions on Biomedical Circuits and Systems

A 128-Channel FPGA-Based Real-Time Spike-Sorting Bidirectional Closed-Loop Neural Interface System

(2017) Jongkil Park et al.   IEEE TRANSACTIONS ON NEURAL SYSTEMS AND REHABILITATION ENGINEERING

Fully integrated silicon probes for high-density recording of neural activity

(2017) James J. Jun et al.   NATURE

A 0.25 V 460 nW Asynchronous Neural Signal Processor With Inherent Leakage Suppression

(2013) Tsung-Te Liu et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

A 75-µW, 16-Channel Neural Spike-Sorting Processor With Unsupervised Clustering

(2013) Vaibhav Karkare et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

An Implantable 455-Active-Electrode 52-Channel CMOS Neural Probe

(2013) Carolina Mora Lopez et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

Feature extraction using first and second derivative extrema (FSDE) for real-time and hardware-efficient spike sorting

(2013) Sivylla E. Paraskevopoulou et al.   JOURNAL OF NEUROSCIENCE METHODS

A 130-$\mu$W, 64-Channel Neural Spike-Sorting DSP Chip

(2011) V Karkare et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

Technology-Aware Algorithm Design for Neural Spike Detection, Feature Extraction, and Dimensionality Reduction

(2010) Sarah Gibson et al.   IEEE TRANSACTIONS ON NEURAL SYSTEMS AND REHABILITATION ENGINEERING

Improving spike separation using waveform derivatives

(2009) Zhi Yang et al.   Journal of Neural Engineering