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Title
Design of a Stable Low Power 11-T Static Random Access Memory Cell
Authors
Keywords
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Journal
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS
Volume -, Issue -, Pages 2050206
Publisher
World Scientific Pub Co Pte Lt
Online
2020-01-30
DOI
10.1142/s0218126620502060
References
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Related references
Note: Only part of the references are listed.- A robust, ultra low-power, data-dependent-power-supplied 11T SRAM cell with expanded read/write stabilities for internet-of-things applications
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- (2017) Ruchi Gupta et al. IETE JOURNAL OF RESEARCH
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- (2016) Soumitra Pal et al. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
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- (2015) P. Upadhyay et al. COMPUTERS & ELECTRICAL ENGINEERING
- A near-threshold 7T SRAM cell with high write and read margins and low write time for sub-20nm FinFET technologies
- (2015) Mohammad Ansari et al. INTEGRATION-THE VLSI JOURNAL
- An 8T Low-Voltage and Low-Leakage Half-Selection Disturb-Free SRAM Using Bulk-CMOS and FinFETs
- (2014) IEEE TRANSACTIONS ON ELECTRON DEVICES
- A new asymmetric 6T SRAM cell with a write assist technique in 65nm CMOS technology
- (2014) Hooman Farkhani et al. MICROELECTRONICS JOURNAL
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- (2010) C.M.R. Prabhu et al. IEICE Electronics Express
- A 32 kb 10T Sub-Threshold SRAM Array With Bit-Interleaving and Differential Read Scheme in 90 nm CMOS
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- Characterization of a Novel Nine-Transistor SRAM Cell
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