Interface Traps in InAs Nanowire Tunnel FETs and MOSFETs—Part II: Comparative Analysis and Trap-Induced Variability

Study of Random Dopant Fluctuation Induced Variability in the Raised-Ge-Source TFET

(2013) Nattapol Damrongplasit et al.   IEEE ELECTRON DEVICE LETTERS

Surface-Roughness-Induced Variability in Nanowire InAs Tunnel FETs

(2012) F. Conzatti et al.   IEEE ELECTRON DEVICE LETTERS

Strain-Induced Performance Improvements in InAs Nanowire Tunnel FETs

(2012) F. Conzatti et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES

Stochastic Variability in Silicon Double-Gate Lateral Tunnel Field-Effect Transistors

(2012) Greg Leung et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES

Defect states at III-V semiconductor oxide interfaces

(2011) L. Lin et al.   APPLIED PHYSICS LETTERS

Subthreshold Degradation of Gate-all-Around Silicon Nanowire Field-Effect Transistors: Effect of Interface Trap Charge

(2011) B. H. Hong et al.   IEEE ELECTRON DEVICE LETTERS

Modeling of High-Performance p-Type III–V Heterojunction Tunnel FETs

(2010) J. Knoch et al.   IEEE ELECTRON DEVICE LETTERS

Suitability Study of Oxide/Gallium Arsenide Interfaces for MOSFET Applications

(2010) Matthias Passlack et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES

Nanometer Device Scaling in Subthreshold Logic and SRAM

(2008) Scott Hanson et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES

Size Dependence of Surface-Roughness-Limited Mobility in Silicon-Nanowire FETs

(2008) Stefano Poli et al.   IEEE TRANSACTIONS ON ELECTRON DEVICES