Separate Extraction of Source, Drain, and Substrate Resistances in MOSFETs With Parasitic Junction Current Method

Published 2010 View Full Article

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Title
Separate Extraction of Source, Drain, and Substrate Resistances in MOSFETs With Parasitic Junction Current Method
Authors
Keywords
-
Journal
IEEE ELECTRON DEVICE LETTERS
Volume -, Issue -, Pages -
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Online
2010-09-29
DOI
10.1109/led.2010.2066257
References
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