Journal
IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY
Volume 6, Issue 1, Pages 189-194Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JEDS.2017.2787137
Keywords
Negative capacitance; two-dimensional materials; analytical model; low-power application
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Funding
- National Key Research and Development Program of China [2016YFA0302300, 2016YFA0200400]
- National Science and Technology Major Project of China [2016ZX02301001]
- National Natural Science Foundation of China [61306105]
- Tsinghua University Initiative Scientific Research Program
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Steep slope (SS < 60 mV/dec at room temperature) negative capacitance (NC) FETs, based on the 2-D transition metal dichalcogenide semiconductor channel materials, may have a promising future in low-power electronics because of their high on-state current and very high on/off ratio. In this paper, we develop an analytically compact drain current model for long-channel back-gated 2-D NC-FETs by solving the classical drift-diffusion equations. The equations describe the transition from depletion to accumulation regimes of operation as a continuous function of gate/drain voltages. The continuity ensures time-efficient simulation of large systems. Several key features of the model are verified by comparing with the experimental data. Specifically, the negative drain induced barrier lowering effect and negative differential resistance effect predicted by the model are successfully observed in our experiments.
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