Journal
IEEE TRANSACTIONS ON POWER ELECTRONICS
Volume 30, Issue 8, Pages 4119-4127Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TPEL.2014.2359005
Keywords
Capacitor voltage balancing; modular multilevel converter (MMC); modulation technique; pulse width modulation
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This paper introduces a low complexity implementation of the voltage balancing algorithm aiming to reduce the switching frequency of the power devices in modular multilevel converters (MMCs). The proposed algorithm features a relatively simple implementation without any conditional execution requirements and is easily expandable regardless of the number of submodules (SMs). Two modulation techniques are evaluated, namely the staircase modulation and the phase-disposition pulse width modulation (PD-PWM) under the conventional and the proposed algorithm. Using a circulating current controller in an MMC with 12 SMs per arm, PD-PWM yields better results compared to the staircase modulation technique. The test condition for this comparison is such that the power devices operate at a similar switching frequency and produce similar amplitudes to the capacitor voltage ripples in both modulation techniques. The results are verified through extensive simulations and experiments on a low power phase-leg MMC laboratory prototype.
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