Set-Triggered-Parallel-Reset Memristor Logic for High-Density Heterogeneous-Integration Friendly Normally Off Applications

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Title
Set-Triggered-Parallel-Reset Memristor Logic for High-Density Heterogeneous-Integration Friendly Normally Off Applications
Authors
Keywords
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Journal
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
Volume 62, Issue 1, Pages 80-84
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Online
2014-10-15
DOI
10.1109/tcsii.2014.2362713

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