Journal
IEEE TRANSACTIONS ON POWER ELECTRONICS
Volume 34, Issue 2, Pages 1022-1025Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TPEL.2018.2850360
Keywords
Capacitor voltage balancing; currentless sorting and selection (SAS); experiments; modular multilevel converter (MMC)
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This letter proposes a currentless sorting and selection (SAS)-based capacitor-voltage-balancing method for modular multilevel converters. Without the knowledge of arm-current signals, this method has almost the same performance as the conventional SAS method while reducing the sampling signals, compacting the control system, and saving the overall cost. In this letter, the derivative of the total capacitor voltage of an arm, instead of the arm current, is employed to determine which submodules should be inserted or bypassed. Furthermore, the efficacy of the proposed method is verified by experimental results.
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