Journal
IEEE ELECTRON DEVICE LETTERS
Volume 39, Issue 5, Pages 715-718Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2018.2819642
Keywords
GaN power device; GaN-on-Si; fully-vertical; power diodes; selective substrate removal; buffer layer; high breakdown voltage; low on-resistance
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Funding
- ARPA-E SWITCHES Program
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This letter demonstrates a novel technology to fabricate fully vertical GaN-on-Si power diodes with state-of-the-art performance. Si substrate and buffer layers were selectively removed and the bottom cathode was formed in the backside trenches extending to an n(+)-GaN layer. A specific differential ON-resistance of 0.35-0.4 m Omega center dot cm(2) (normalized to the total device area) and a breakdown voltage of 720 V were demonstrated in this novel fully vertical GaN-on-Si p-n diode, rendering a Baliga's figure of merit over 1.5 GW/cm(2). These results set a new record performance in all vertical GaN power diodes on foreign substrates, and demonstrate the feasibility of making fully vertical GaN-on-Si power diodes and transistors by selective removal of Si substrates and buffer layers.
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