A 0.18-μm CMOS high-data-rate true random bit generator through ΔΣ modulation of chaotic jerk circuit signals
Published 2018 View Full Article
- Home
- Publications
- Publication Search
- Publication Details
Title
A 0.18-μm CMOS high-data-rate true random bit generator through ΔΣ modulation of chaotic jerk circuit signals
Authors
Keywords
-
Journal
CHAOS
Volume 28, Issue 6, Pages 063126
Publisher
AIP Publishing
Online
2018-06-26
DOI
10.1063/1.5022838
References
Ask authors/readers for more resources
Related references
Note: Only part of the references are listed.- Recoverable Random Numbers in an Internet of Things Operating System
- (2017) Taeill Yoo et al. Entropy
- A 82-nW Chaotic Map True Random Number Generator Based on a Sub-Ranging SAR ADC
- (2017) Minseo Kim et al. IEEE JOURNAL OF SOLID-STATE CIRCUITS
- An Improved DCM-Based Tunable True Random Number Generator for Xilinx FPGA
- (2017) Anju P. Johnson et al. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
- A minimum five-component five-term single-nonlinearity chaotic jerk circuit based on a twin-jerk single-op-amp technique
- (2017) Buncha Munmuangsaen et al. INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS
- A digital pseudo-random number generator based on sawtooth chaotic map with a guaranteed enhanced period
- (2017) Mohammad A. Dastgheib et al. NONLINEAR DYNAMICS
- Application of a MEMS-Based TRNG in a Chaotic Stream Cipher
- (2017) Miguel Garcia-Bosque et al. SENSORS
- Pseudorandom number generation using chaotic true orbits of the Bernoulli map
- (2016) Asaki Saito et al. CHAOS
- Generating multi-double-scroll attractors via nonautonomous approach
- (2016) Qinghui Hong et al. CHAOS
- Chaos in a Single Op-Amp–Based Jerk Circuit: Experiments and Simulations
- (2016) Robert Tchitnga et al. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
- Theory and implementation of a very high throughput true random number generator in field programmable gate array
- (2016) Yonggang Wang et al. REVIEW OF SCIENTIFIC INSTRUMENTS
- Synchronization of chaotic systems
- (2015) Louis M. Pecora et al. CHAOS
- A cubic map chaos criterion theorem with applications in generalized synchronization based pseudorandom number generator and image encryption
- (2015) Xiuping Yang et al. CHAOS
- Complexity Analysis and DSP Implementation of the Fractional-Order Lorenz Hyperchaotic System
- (2015) Shaobo He et al. Entropy
- Design of High Speed and Low Offset Dynamic Latch Comparator in 0.18 µm CMOS Process
- (2014) Labonnah Farzana Rahman et al. PLoS One
- Fully digital jerk-based chaotic oscillators for high throughput pseudo-random number generators up to 8.77Gbits/s
- (2013) A.S. Mansingka et al. MICROELECTRONICS JOURNAL
- Pseudorandom sequence generator based on the Chen chaotic system
- (2012) HanPing Hu et al. COMPUTER PHYSICS COMMUNICATIONS
- A New Chaotic Jerk Circuit
- (2011) J. C. Sprott IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
- Implementation and Testing of High-Speed CMOS True Random Number Generators Based on Chaotic Systems
- (2010) Fabio Pareschi et al. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
- Simple Autonomous Chaotic Circuits
- (2010) Jessica R. Piper et al. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
- Implementation of 140 Gb/s true random bit generator based on a chaotic photonic integrated circuit
- (2010) Apostolos Argyris et al. OPTICS EXPRESS
- True Random Number Generator With a Metastability-Based Quality Control
- (2008) Carlos Tokunaga et al. IEEE JOURNAL OF SOLID-STATE CIRCUITS
Add your recorded webinar
Do you already have a recorded webinar? Grow your audience and get more views by easily listing your recording on Peeref.
Upload NowCreate your own webinar
Interested in hosting your own webinar? Check the schedule and propose your idea to the Peeref Content Team.
Create Now