Low-Power Hybrid 1-Bit Full-Adder Circuit for Energy Efficient Arithmetic Applications

Title
Low-Power Hybrid 1-Bit Full-Adder Circuit for Energy Efficient Arithmetic Applications
Authors
Keywords
-
Journal
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS
Volume 26, Issue 01, Pages 1750014
Publisher
World Scientific Pub Co Pte Lt
Online
2016-08-29
DOI
10.1142/s0218126617500141

Ask authors/readers for more resources

Discover Peeref hubs

Discuss science. Find collaborators. Network.

Join a conversation

Ask a Question. Answer a Question.

Quickly pose questions to the entire community. Debate answers and get clarity on the most important issues facing researchers.

Get Started