Low power and robust memory circuits with asymmetrical ground gating

Authors

Keywords

MTCMOS, Data stability, Static noise margin, Write voltage margin, Write assist transistor, Leakage power consumption, Data retention SLEEP mode, Process parameter variations, Minimum power supply voltage

Journal

MICROELECTRONICS JOURNAL

Volume 48, Issue -, Pages 109-119

Publisher

Elsevier BV

Online

2016-01-02

DOI

10.1016/j.mejo.2015.11.009

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