R-inmac: 10T SRAM based reconfigurable and efficient in-memory advance computation for edge devices

A 2941-TOPS/W Charge-Domain 10T SRAM Compute-in-Memory for Ternary Neural Network

(2023) Sungsoo Cheon et al.   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

Two-Direction In-Memory Computing Based on 10T SRAM With Horizontal and Vertical Decoupled Read Ports

(2021) Zhiting Lin et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

In-Memory Computing With Double Word Lines and Three Read Ports for Four Operands

(2020) Zhiting Lin et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

A reliable, multi-bit error tolerant 11T SRAM memory design for wireless sensor nodes

(2020) Vishal Sharma et al.   ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING

Reconfigurable 2T2R ReRAM Architecture for Versatile Data Storage and Computing In-Memory

(2020) Yuzong Chen et al.   IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

Xcel-RAM: Accelerating Binary Neural Networks in High-Throughput SRAM Compute Arrays

(2019) Amogh Agrawal et al.   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

A Dual-Split 6T SRAM-Based Computing-in-Memory Unit-Macro With Fully Parallel Product-Sum Operation for Binarized DNN Edge Processors

(2019) Xin Si et al.   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

A 4 + 2T SRAM for Searching and In-Memory Computing With 0.3-V $V_{\mathrm {DDmin}}$

(2018) Qing Dong et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

X-SRAM: Enabling In-Memory Boolean Computations in CMOS Static Random Access Memories

(2018) Amogh Agrawal et al.   IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

XNOR Neural Engine: a Hardware Accelerator IP for 21.6 fJ/op Binary Neural Network Inference

(2018) Francesco Conti et al.   IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS

A robust, ultra low-power, data-dependent-power-supplied 11T SRAM cell with expanded read/write stabilities for internet-of-things applications

(2018) Vishal Sharma et al.   ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING

A Variation-Tolerant In-Memory Machine Learning Classifier via On-Chip Training

(2018) Sujan K. Gonugondla et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

In-Memory Computation of a Machine-Learning Classifier in a Standard 6T SRAM Array

(2017) Jintao Zhang et al.   IEEE JOURNAL OF SOLID-STATE CIRCUITS

Table of contents

(2016)   IEEE JOURNAL OF SOLID-STATE CIRCUITS

Variation Tolerant Differential 8T SRAM Cell for Ultralow Power Applications

(2016) Soumitra Pal et al.   IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS