Journal
IEEE ELECTRON DEVICE LETTERS
Volume 37, Issue 3, Pages 269-271Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2016.2515103
Keywords
GaN; transistor; CMOS; gate insulator; selective area epitaxy; inverter; IC
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This letter reports the first demonstration of gallium nitride (GaN) complementary metal-oxide-semiconductor (CMOS) field-effect-transistor technology. Selective area epitaxy was employed to have both GaN N-channel MOSFET (NMOS) and P-channel MOSFET (PMOS) structures on the same wafer. An AlN/SiN dielectric stack grown by metal-organic chemical vapor deposition served as the gate oxide for both NMOS and PMOS, yielding enhancement-mode N-and P-channel with the electron mobility of 300 cm(2)/V-s and hole mobility of 20 cm(2)/V-s, respectively. Using the GaN CMOS technology, a functional inverter integrated circuit was fabricated and characterized.
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