FPGA design of EKF block accelerator for 3D visual SLAM

Published 2016 View Full Article

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Title
FPGA design of EKF block accelerator for 3D visual SLAM
Authors
Keywords
Visual EKF-SLAM, SoC, FPGA, Co-processor, AHP
Journal
COMPUTERS & ELECTRICAL ENGINEERING
Volume 55, Issue -, Pages 123-137
Publisher
Elsevier BV
Online
2016-05-14
DOI
10.1016/j.compeleceng.2016.05.003

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