III-V/Si staggered heterojunction based source-pocket engineered vertical TFETs for low power applications

Title
III-V/Si staggered heterojunction based source-pocket engineered vertical TFETs for low power applications
Authors
Keywords
Band-to-band tunneling (BTBT), Heterojunction, Source pocket, Sub-threshold swing (SS), Tunnel field effect transistor (TFET)
Journal
SUPERLATTICES AND MICROSTRUCTURES
Volume 142, Issue -, Pages 106494
Publisher
Elsevier BV
Online
2020-04-09
DOI
10.1016/j.spmi.2020.106494

Ask authors/readers for more resources

Reprint

Contact the author

Find the ideal target journal for your manuscript

Explore over 38,000 international journals covering a vast array of academic fields.

Search

Create your own webinar

Interested in hosting your own webinar? Check the schedule and propose your idea to the Peeref Content Team.

Create Now