Thermal TSV Optimization and Hierarchical Floorplanning for 3-D Integrated Circuits

Published 2020 View Full Article

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Title
Thermal TSV Optimization and Hierarchical Floorplanning for 3-D Integrated Circuits
Authors
Keywords
-
Journal
IEEE Transactions on Components Packaging and Manufacturing Technology
Volume 10, Issue 4, Pages 599-610
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Online
2020-01-30
DOI
10.1109/tcpmt.2020.2970382

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