Device and Circuit-Level Assessment of GaSb/Si Heterojunction Vertical Tunnel-FET for Low-Power Applications

Title
Device and Circuit-Level Assessment of GaSb/Si Heterojunction Vertical Tunnel-FET for Low-Power Applications
Authors
Keywords
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Journal
IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 67, Issue 3, Pages 1285-1292
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Online
2020-02-06
DOI
10.1109/ted.2020.2964428

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