Metal-layer capacitors in the 65nm CMOS process and the application for low-leakage power-rail ESD clamp circuit

Published 2013 View Full Article

Title

Metal-layer capacitors in the 65nm CMOS process and the application for low-leakage power-rail ESD clamp circuit

Authors

Keywords

-

Journal

MICROELECTRONICS RELIABILITY

Volume 54, Issue 1, Pages 64-70

Publisher

Elsevier BV

Online

2013-09-22

DOI

10.1016/j.microrel.2013.08.011

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