Trades-off between lithography line edge roughness and error-correcting codes requirements for NAND Flash memories

Title
Trades-off between lithography line edge roughness and error-correcting codes requirements for NAND Flash memories
Authors
Keywords
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Journal
MICROELECTRONICS RELIABILITY
Volume 52, Issue 3, Pages 525-529
Publisher
Elsevier BV
Online
2012-01-29
DOI
10.1016/j.microrel.2011.09.037

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