Wafer-level bonding/stacking technology for 3D integration

Published 2009 View Full Article

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Title
Wafer-level bonding/stacking technology for 3D integration
Authors
Keywords
-
Journal
MICROELECTRONICS RELIABILITY
Volume 50, Issue 4, Pages 481-488
Publisher
Elsevier BV
Online
2009-11-04
DOI
10.1016/j.microrel.2009.09.015

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