The preparation of AZO/a-Si/c-Si heterojunction structure on p-type silicon substrate for solar cell application

An AZO/a-Si/c-Si heterojunction structure was prepared by PECVD and MBE systems. The electrical properties of the AZO/a-Si/c-Si heterojunction structure have been carried out by means of I-V and minority carrier lifetime measurements. The AZO/a-Si/c-Si heterojunction devices annealed in low temperatures lead to effects of the passivation of the surface and bulk of Si, while the annealing of AZO/a-Si/c-Si heterojunction devices in higher temperatures will cause a larger dark current and lower minority carrier lifetime. (c) 2014 Elsevier B.V. All rights reserved.