Low-power algorithm for automatic topology generation for application-specific networks on chips

Title
Low-power algorithm for automatic topology generation for application-specific networks on chips
Authors
Keywords
-
Journal
IET Computers and Digital Techniques
Volume 2, Issue 3, Pages 239
Publisher
Institution of Engineering and Technology (IET)
Online
2008-04-18
DOI
10.1049/iet-cdt:20070049

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