Journal
IEEE TRANSACTIONS ON POWER ELECTRONICS
Volume 28, Issue 9, Pages 4216-4226Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TPEL.2012.2235859
Keywords
GaN transistors; parasitics; point-of-load (POL) converter; thermal management; 3-D integration
Categories
Funding
- APRA-E under the Power Supplies on a Chip (PSOC) [DE-AR00000106]
- Power Management Consortium (PMC) in Center for Power Electronics Systems Virginia Tech
- IR
- EPC
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The demand for the future power supplies that can achieve higher output currents, smaller sizes, and higher efficiencies cannot be satisfied with the conventional technologies. There are limitations in the switch performance, packaging parasitics, layout parasitics, and thermal management that must be addressed to push for higher frequencies and improved power density. To address these limitations, the utilization of Gallium-Nitride (GaN) transistors, 3-D integrated technique, low-profile magnetic substrates, and ceramic substrates with high thermal conductivity are considered. This paper discusses the characteristics of GaN transistors, including the fundamental differences between the enhancement mode and the depletion mode GaN transistors, gate driving, and the deadtime loss, the effect of parasitics on the performance of high-frequency GaN point-of-load (POLs), the 3-D co-package technique to integrate the active layer with low profile low temperature cofired ceramic magnetic substrate, and the thermal design of a high -density module using advanced substrates. The final demonstrators are three 12-1.2-V conversion POL modules: a single-phase 20 A 900 W/in(3) 2-MHz converter using enhancement mode GaN transistors, a single-phase10-A 800 W/in(3) 5-MHz converter, and a two-phase 20-A 1100 W/in(3) 5-MHz converter using the depletion mode GaN transistors. These converters offer unmatched power density compared to state-of-the-art industry products and research.
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