Reconfigured-Wafer-to-Wafer 3-D Integration Using Parallel Self-Assembly of Chips With Cu–SnAg Microbumps and a Nonconductive Film

Title
Reconfigured-Wafer-to-Wafer 3-D Integration Using Parallel Self-Assembly of Chips With Cu–SnAg Microbumps and a Nonconductive Film
Authors
Keywords
-
Journal
IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 61, Issue 2, Pages 533-539
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Online
2014-01-25
DOI
10.1109/ted.2013.2294831

Ask authors/readers for more resources

Find Funding. Review Successful Grants.

Explore over 25,000 new funding opportunities and over 6,000,000 successful grants.

Explore

Become a Peeref-certified reviewer

The Peeref Institute provides free reviewer training that teaches the core competencies of the academic peer review process.

Get Started