A 3$\,\times\,$5-Gb/s Multilane Low-Power 0.18-$\mu{\hbox {m}}$ CMOS Pseudorandom Bit Sequence Generator

Published 2008 View Full Article

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Title
A 3$\,\times\,$5-Gb/s Multilane Low-Power 0.18-$\mu{\hbox {m}}$ CMOS Pseudorandom Bit Sequence Generator
Authors
Keywords
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Journal
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
Volume 55, Issue 5, Pages 432-436
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Online
2008-05-22
DOI
10.1109/tcsii.2007.912696

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