Journal
IEEE ELECTRON DEVICE LETTERS
Volume 35, Issue 9, Pages 900-902Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2014.2339227
Keywords
Silicon; germanium; MBE; TEM; dislocation; MOSFETs; subthreshold slope; mobility
Categories
Funding
- National Science Foundation [DMR-0907112, CMMI-1068970]
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We report the material characterization of continuous, wafer-scale Ge films epitaxially grown on Si by molecular beam epitaxy. The material quality of Ge is further tested by fabricating high-mobility, long-channel MOSFETs. Our growth technique makes use of a thin chemical SiO2 template with nanoscale windows and carefully timed thermal annealing during the initial stage of island coalescence. The resulting defect density in n- and p-type Ge is similar to 2 x 10(5) and 5 x 10(7) cm(-2). The MOSFETs are then fabricated on these substrates, where the gate-stack consists of Ti/HfO2/GeOxNy/Ge-on-Si. The GeOxNy interlayer is used to effectively passivate the Ge surface. The subthreshold slope is similar to 100 and similar to 200 mV/decade for p- and n-MOSFETs, compared with similar to 80 mV/decade for p-MOSFETs built on bulk-Ge substrates. The p- and n-MOSFETs also show enhanced peak effective hole and electron mobilities of 400 and 950 cm(2)/V-s that are 82% and 30% increase over the universal mobilities in Si.
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