Nonvolatile Charge-Trap Memory Transistors With Top-Gate Structure Using In–Ga–Zn-O Active Channel and ZnO Charge-Trap Layer

Authors

Keywords

Journal

Volume 35, Issue 3, Pages 357-359

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Online

2014-02-01

DOI

10.1109/led.2014.2301800

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