4.6 Article

Extraction Technique for Intrinsic Subgap DOS in a-IGZO TFTs by De-Embedding the Parasitic Capacitance Through the Photonic C-V Measurement

Journal

IEEE ELECTRON DEVICE LETTERS
Volume 34, Issue 1, Pages 57-59

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2012.2222014

Keywords

Amorphous; extraction; overlap capacitance; parasitic capacitance; parasitic effect; subgap density of states (DOS); thin-film transistors (TFTs)

Funding

  1. National Research Foundation of Korea
  2. Korea government (Ministry of Education and Science Technology) [2010-0013883, 2009-0080344]

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We report a technique for extraction of the intrinsic subgap density of states (gA,(int)(E)) by deembedding the parasitic capacitance in amorphous indium-gallium-zinc-oxide TFTs through the optical charge pumping method. As structure-dependent parameters in the proposed extraction technique, the overlap length L-ov between the source/drain (S/D) and the active layer and the parasitic overlap area between the gate and the S/D metal (C-par,C-S/C-par,C-D) are considered under dark and subbandgap photonic states. We obtained g(A,int)(E) as a superposition of the exponential deep and tail states with N-TA,N-int = 6.0x10(16) eV(-1) . cm(-3), kT(TA,int) = 0.16 eV, N-DA,N-int = 1.8 x 10(15) eV(-1) . cm(-3), and kT(DA,int) = 1.9 eV from samples with various parasitic areas.

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