4.6 Article

Enhancement-Mode InAlN/AlN/GaN HEMTs With 10-12 A/mm Leakage Current and 1012 ON/OFF Current Ratio

Journal

IEEE ELECTRON DEVICE LETTERS
Volume 32, Issue 3, Pages 309-311

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2010.2095494

Keywords

Enhancement mode (E-mode); gate leakage current; InAlN; postprocessing annealing

Funding

  1. Defense Advanced Research Projects Agency [HR0011-10-C-0015]

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Postprocessing annealing in forming gas at 400 degrees C was performed on enhancement-mode lattice-matched InAlN/AlN/GaN high-electron-mobility transistors fabricated by selective etch of InAlN under a Pt gate. After postprocessing annealing, the device reverse gate leakage current decreased from 10(-7) to 10(-12) A/mm at V-gs = -1 V and V-ds = 6 V, showing an ON/OFF current ratio of 10(12) that is the highest reported value for all GaN-based transistors. The gate diode breakdown voltage was observed to increase from similar to 9 to similar to 29 V; the transistor threshold voltage was also found to shift from 0.6 to 1.2 V. All these observations indicate that an electrically thinner and more insulating interlayer is most likely formed between the Pt gate and underlying channel after postprocessing annealing, which is ascribed to multiple possible mechanisms including increase in barrier height, reduction in interface states introduced during the gate recess process, formation of a thin oxide layer, etc.

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