Journal
IEEE ELECTRON DEVICE LETTERS
Volume 31, Issue 12, Pages 1383-1385Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2010.2072771
Keywords
Enhancement mode (E-mode); HFET; high-electron-mobility transistor (HEMT); InAlN; interface state; subthreshold slope
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Funding
- Defense Advanced Research Projects Agency [HR0011-10-C-0015]
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Having a drain current density of 1.9 A/mm, a peak extrinsic transconductance of 800 mS/mm (the highest reported in III-nitride transistors), f(t)/f(max) of 70/105 GHz, and V-br of 29 V, 150-nm-gate enhancement-mode InAlN/AlN/GaN high-electron-mobility transistors are demonstrated on SiC substrates using plasma-based gate-recess etch. The possible plasma-induced damage in the gate region was investigated using interface-trap states extracted from temperature-dependent subthreshold slopes.
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