Suppression of Drain-Induced Barrier Lowering in Silicon-on-Insulator MOSFETs Through Source/Drain Engineering for Low-Operating-Power System-on-Chip Applications

标题
Suppression of Drain-Induced Barrier Lowering in Silicon-on-Insulator MOSFETs Through Source/Drain Engineering for Low-Operating-Power System-on-Chip Applications
作者
关键词
-
出版物
IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 60, Issue 1, Pages 260-267
出版商
Institute of Electrical and Electronics Engineers (IEEE)
发表日期
2012-11-16
DOI
10.1109/ted.2012.2225063

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