4.2 Article

Novel Bumping and Underfill Technologies for 3D IC Integration

Journal

ETRI JOURNAL
Volume 34, Issue 5, Pages 706-712

Publisher

WILEY
DOI: 10.4218/etrij.12.0112.0104

Keywords

Maskless bumping; solder bump maker (SBM); fluxing underfill; through silicon via (TSV); stacking process

Funding

  1. IT R&D program of MKE/KEIT [KI002134]
  2. Components and Materials Technology Development Project of MKE/KEIT [10037039]
  3. Korea Evaluation Institute of Industrial Technology (KEIT) [KI002134, 10037039] Funding Source: Korea Institute of Science & Technology Information (KISTI), National Science & Technology Information Service (NTIS)

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In previous work, novel maskless bumping and no-flow underfill technologies for three-dimensional (3D) integrated circuit (IC) integration were developed. The bumping material, solder bump maker (SBM) composed of resin and solder powder, is designed to form low-volume solder bumps on a through silicon via (TSV) chip for the 3D IC integration through the conventional reflow process. To obtain the optimized volume of solder bumps using the SBM, the effect of the volumetric mixing ratio of resin and solder powder is studied in this paper. A no-flow underfill material named fluxing underfill is proposed for a simplified stacking process for the 3D IC integration. It can remove the oxide layer on solder bumps like flux and play a role of an underfill after the stacking process. The bumping process and the stacking process using the SBM and the fluxing underfill, respectively, for the TSV chips are carefully designed so that two-tier stacked TSV chips are sucessfully stacked.

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