4.6 Article

A new classification approach for neural networks hardware: from standards chips to embedded systems on chip

Journal

ARTIFICIAL INTELLIGENCE REVIEW
Volume 41, Issue 4, Pages 491-534

Publisher

SPRINGER
DOI: 10.1007/s10462-012-9321-7

Keywords

ANN hardware; Classification; Neurocomputers; VLSI; ASICs; FPGA; Embedded systems on chip

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The aim of this paper is to propose a new classification approach of artificial neural networks hardware. Our motivation behind this work is justified by the following two arguments: first, during the last two decades a lot of approaches have been proposed for classification of neural networks hardware. However, at present there is not a clear consensus on classification criteria and performances. Second, with the evolution of the microelectronic technology and the design tools and techniques, new artificial neural networks (ANNs) implementations have been proposed, but they are not taken into consideration in the existing classification approaches of ANN hardware. In this paper, we propose a new approach for classification of neural networks hardware. The paper is organized in three parts: in the first part we review most of existing approaches proposed in the literature during the period 1990-2010 and show the advantages and disadvantages of each one. In the second part, we propose a new classification approach that takes into account most of consensual elements in one hand and in the other hand it takes into consideration the evolution of the design technology of integrated circuits and the design techniques. In the third part, we review examples of neural hardware achievements from industrial, academic and research institutions. According to our classification approach, these achievements range from standard chips to VLSI ASICs, FPGA and embedded systems on chip. Finally, we enumerate design issues that are still posed. This could help to give new directions for future research work.

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