Journal
APPLIED PHYSICS LETTERS
Volume 113, Issue 8, Pages -Publisher
AMER INST PHYSICS
DOI: 10.1063/1.5039967
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Funding
- National Key Research & Development Program [2016YFA0201901, 2016YFA0201902]
- National Science Foundation of China [61621061, 61427901]
- Beijing Municipal Science and Technology Commission [D171100006617002 1-2]
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Wafer-scale fabrication of transistors is the prerequisite for practical applications of carbon nanotube (CNT) based electronics. In this work, we fabricated top-gated thin film transistors (TFTs) based on solution-derived CNT film prepared on a 2 in. substrate through a photolithography based process. In particular, we improved the gate dielectric layer in CNT TFTs through using a thin thermal oxidized Y2O3 film as a buffer layer before the growth of high-kappa HfO2 layer. The introduction of the Y2O3 film significantly enhanced the performance of CNT TFTs, including the improved on-state current and transconductance, lowered threshold voltage and subthreshold swing, and drastically enhanced carrier mobility, owing to the reduction of the interface state density and scattering centers. Quantitative extraction of the interface state density based on either capacitance-voltage measurements or subthreshold swing data further demonstrates that the introduction of the Y2O3 interlayer reduces the interface state density from 9.24 x 10(12) cm(-2) to 4.63 x 10(12) cm(-2) in the gate insulator. Published by AIP Publishing.
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