4.6 Article

PAM: an efficient power-aware multilevel cache policy to reduce energy consumption of storage systems

Journal

FRONTIERS OF COMPUTER SCIENCE
Volume 13, Issue 4, Pages 850-863

Publisher

HIGHER EDUCATION PRESS
DOI: 10.1007/s11704-017-6500-3

Keywords

storage system; multilevel cache; energy consumption; I; O performance; hint

Funding

  1. National 863 Program of China [2015AA015302]
  2. National 973 Program of China [2015CB352403]
  3. National Natural Science Foundation of China (NSFC) [61572323, 61628208]

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Energy consumption is one of the most significant aspects of large-scale storage systems where multilevel caches are widely used. In a typical hierarchical storage structure, upper-level storage serves as a cache for the lower level, forming a distributed multilevel cache system. In the past two decades, several classic LRU-based multilevel cache policies have been proposed to improve the overall I/O performance of storage systems. However, few power-aware multilevel cache policies focus on the storage devices in the bottom level, which consume more than 27% of the energy of the whole system [1].To address this problem, we propose a novel power-aware multilevel cache (PAM) policy that can reduce the energy consumption of high-performance and I/O bandwidth storage devices. In our PAM policy, an appropriate number of cold dirty blocks in the upper level cache are identified and selected to flush directly to the storage devices, providing high probability extension of the lifetime of disks in standby mode. To demonstrate the effectiveness of our proposed policy, we conduct several simulations with real-world traces. Compared to existing popular cache schemes such as PA-LRU, PB-LRU, and Demote, PAM reduces power consumption by up to 15% under different I/O workloads, and improves energy efficiency by up to 50.5%.

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