2D Semiconductor FETs—Projections and Design for Sub-10 nm VLSI

Title
2D Semiconductor FETs—Projections and Design for Sub-10 nm VLSI
Authors
Keywords
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Journal
IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 62, Issue 11, Pages 3459-3469
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Online
2015-09-16
DOI
10.1109/ted.2015.2443039

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