Journal
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Volume 62, Issue 5, Pages 1392-1401Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSI.2015.2403033
Keywords
Asynchronous circuit design; biomedical signal processing; continuous-time digital signal processing; level-crossing sampling; memristor; timing storage
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This paper proposes a new timing storage circuit based on memristors. Its ability to store and reproduce timing information in an analog manner without performing quantization can be useful for a wide range of applications. For continuous-time (CT) digital filters, the power and area costly analog delay blocks, which are usually implemented as inverter chains or their variants, can be replaced by the proposed timing storage circuits to delay CT digital signals in a more efficient way, especially for low-frequency biomedical applications that require very long tap delays. In addition, the same timing storage circuits also enable the storage of CT digital signals, extending the benefits of CT digital signal processing (DSP) to applications that require signal storage. As an example, a 15-tap CT finite impulse response (FIR) Savitzky-Golay (S-G) filter was designed with memristor-based delay blocks to smoothen electrocardiographic (ECG) signals accompanied with high-frequency noise. The simulated power consumption under a 3.3-volt supply was 6.63 mu w.
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